Gallium nitride (GaN) high electron mobility transistor (HEMT) devices have high breakdown voltages and high cutoff frequencies. GaN field effect transistor (FET) devices have been accordingly useful in high power and high efficiency amplifiers and other devices for high frequency communications and other high frequency applications. HEMT devices are also known as heterojunction field effect transistor (HFET) devices in reference to the derivation of a transistor from a heterostructure.
The use of HFET devices in high frequency applications places an emphasis on the quality of the ground connection. HFET devices are often designed to minimize the resistance and inductance of the ground connection. A typical ground connection in HFET devices is accordingly not made through wire bonds or other high inductance connections. Through-wafer vias are instead commonly used to connect terminals (e.g., source terminals) of an HFET device to ground.
The layout of radio frequency (RF) power FET devices often presents a tradeoff between RF performance, thermal resistance, and cost (e.g., die size). For instance, changing the positions of through-wafer source vias may improve RF performance at the expense of increased thermal resistance of the device, increased cost of the device (e.g., due to an increase in die size), or both. In existing RF power FET layouts, for example, source vias positioned outside an array of gates may lead to increased source inductance and increased size. On the other hand, existing layouts with source vias embedded inside the array of gates may lead to non-uniform gate pitch, which may compromise the thermal resistance of the device.
The tradeoffs are often especially undesirable for GaN devices. The cost per unit die area is much higher for GaN devices than for silicon or Gallium arsenide (GaAs) devices.